Comparing phase detectors in analog Phase-Locked Loops
Polytechnic School, University of São Paulo-USP, São Paulo, SP, Brazil
2 Institute of Science and Technology, São Paulo State University-UNESP, Sorocaba, SP, Brazil
Accepted: 8 July 2021
Published online: 27 July 2021
The Phase-Locked Loops, conceived in the 1930’s by Henri de Bellescize, and used in a large scale on TV sets and integrated services digital telecommunication networks are nowadays increasing their relevance, being present in the time-basis generation and detection either in integrated circuits or in smart-grids power distribution systems. Among the Phase-Locked Loop architecture components is the Phase Detector. The phase detection function is a measure of phase/frequency errors in the Phase-Locked Loop, with analog, hybrid and digital implementations. In most of the classical literature the phase detection function is implemented by a signal multiplier device that can be approximated by a sine function from the phase error. Additional simplifications made on the phase detection function approximates the Phase-Locked Loop to a Düffing system. The phase detection function usually generates oscillations, such as the double-frequency jitter, which is a sinusoidal signal with the double of the synchronization frequency. Nowadays, software implementation allows a considerable flexibility to the phase detection function. Therefore, the phase detection requires accurate modeling to guarantee precision to the obtained clock signals. This work presents a performance comparison between the multiplier, the sine and the Düffing detectors.
© The Author(s), under exclusive licence to EDP Sciences, Springer-Verlag GmbH Germany, part of Springer Nature 2021